Contact

Dr. Roland Beyer
PostDoc / Beamline scientist
Nuclear Physics
roland.beyerAthzdr.de
Phone: +49 351 260 - 3281

Initialization of the VME electronics for (n,n'g) experiments

(old version up to July 2013)

(back to setup selection)

The initialization of the VME modules is controlled via the files "setup_vme_0.ini" and "setup_vme_1.ini" for the Plastic Scintillator Setup and the BaF2-Array, respectively. Each line of these files has to have the following structure: "variable = value". Everything behind an double slash "//" is interpreted as a comment. Values can be set decimal or hexadecimal (0x...). Tabs, multiple spaces and empty lines are ignored. A line containing "endnow = 1" will cause MBS to stop reading the setup file, i.e. everything below this line will be ignored.

The following variables are accepted:

setup_vme_0.ini:

Variable

Meaning

Value Range

Recom-
mended for (n,n'g)

General
comment defines which comments should be printed out to the mbsprint_vme_0.l log-file 0: no comments
1: all comments
2: scaler values, errors, initialization
2
testrun defines if the current setup_vme_0.ini will be copied for logging into the directory "mbsrun/nng/log/" 0: setup will be saved
1: setup will not be saved
0
scalerrestart defines if a check should be enabled at each scaler readout (trigger type 2) if the electronics setup is paralyzed, i.e. if the QDC buffers are full although TDC almost full level not reached 0: disabled
1: enabled
1
sleeptime defines time (in micro sec) how long the plastic branch should wait after initialization before starting measurement to be synchronized with the BaF2 branch   0
setped defines if the SetPed routine is started to set the TAPS QDC pedestal values automatically to 100 0: disabled
1: enabled
0
fastanalysis defines if a fast analysis of the plastics time-of-flight spectra is written to "mbs_ratios.l" 0: disabled
1: enabled
1
printveto defines if veto length values are printed out 0: disabled
1: enabled
0
Scaler
sis3820_LNEtime time between each scaler readout in seconds 1...420 15
ADC
v556_thrl threshold   0x1
v556_cntr control register (see manual, bit 0..7: enable input channels)   0x1
FPGA
v1495_reload defines if the V1495 user FPGA firmware is reloaded before initialization 0: disabled
1: enabled
0
v1495_maj BaF2 majority level 1...63 1
v1495_pl_logic defines the logic function to be applied to both inputs of one plastic detector 0: AND
1: OR
0
v1495_baf_logic defines the logic function to be applied to both inputs of one BaF2 detector 0: AND
1: OR
0
v1495_trig_wdth trigger width in ns (should be multiples of 10 ns) 10...655350 3000
v1495_trig_scal downscale factor for readout Trigger 1...65535 31
v1495_a_mask_l Port A masking, low bits A[0] ... A[15]: Plastic trigger input all plastics: 0x0fff
no plastics: 0x0000
0x0fff
v1495_a_mask_h Port A masking, high bits A[16] ... A[31]: Plastic trigger input FC: 0x4000
no FC: 0x0000
0x4000
v1495_b_mask_l Port B masking, low bits B[0] ... B[15]: Busy signals only plastics: 0x7700
only BaF2: 0x70ff
only FC: 0x7800
0x7fff
v1495_b_mask_h Port B masking, high bits B[16] ... B[31]: not used 0x0000 0x0000
v1495_d_mask_l Port D masking, low bits D[0] ... D[15]: BaF2 trigger input no BaF2: 0x0000
only BaF2: 0xffff
0x0000
v1495_d_mask_h Port D masking, high bits D[16] ... D[31]: BaF2 trigger input no BaF2: 0x0000
only BaF2: 0xffff
0x0000
v1495_e_mask_l Port E masking, low bits E[0] ... E[15]: Scaler outputs   0xffff
v1495_e_mask_h Port E masking, high bits E[16] ... E[31]: Scaler outputs   0xffff
v1495_f_mask_l Port F masking, low bits F[0] ... F[15]: trigger output only plastic: 0xec33
only BaF2: 0xecc5
only FC: 0xec39
0xecff
v1495_f_mask_h Port F masking, high bits F[16] ... F[31]: monitor pins, bit 0..5: plastic coincidence   0xffff
v1495_scal_pl_## downscale factor for plastic detectors; ## = {00...07} 0...255
0 = off
1
v1495_scal_baf_## downscale factor for BaF2 detectors; ## = {00...15} 0...255
0 = off
1
v1495_baf_or_scal downscale factor for BaF2 OR/Majority 1...255 1
v1495_pl_or_scal downscale factor for plastic OR 1...255 1
v1495_coin_win length of the coincidence window for majority determination in ns (should be multiples of 25 ns) 25...1638375 3000
v1495_pl_or_win length of the coincidence window for OR determination in ns (should be multiples of 25 ns) 25...1638375 3000
v1495_glob_or_win length of the coincidence window for global OR determination in ns (should be multiples of 25 ns) 25...1638375 3000
v1495_delay_# gate output delay; # = {1...3} (should be multiples of 10 ns) 10...655350 1 (Pl Taps): 350
2 (BaF Taps): 170
3 (ADC): 250
v1495_gate_# gate output width; # = {1...3} (should be multiples of 10 ns) 10...655350 1 (Pl Taps): 100
2 (BaF Taps): 100
3 (ADC): 5500
TDC
v1190a_out_prog POUT output 0: Data Ready, 1: Full
2: Almost Full, 3: Error
0
v1190a_alm_full Almost Full level 1... 32735 1500
v1190a_acqmode acquisition mode 0x0000: trigger matching
0x0100: continuous storage
0x0000
v1190a_winwidth match window width in ns 25...102375 6000
v1190a_winoff match window offset before trigger in ns -1000...51200 5000
v1190a_extrasearch extra search margin   8
v1190a_reject reject margin   1
v1190a_edgedet edge detection mode 0: pair
1: trailing
2: leading
3: leading + trailing
2
v1190a_leadres resolution for leading edge in ps   100
v1190a_widthres resolution for width in ps   100
v1190a_ctrl control register cf. manual p. 71 0x228
v1190a_headtrail define if TDC header and trailer are enabled 0x3000: enabled
0x3100 disabled
0x3100
Fast analysis
backmin ToF cuts: plastic background lower limit   see PLSUMTDCS histogram
backmax ToF cuts: plastic background upper limit   see PLSUMTDCS histogram
gamma1min ToF cuts: plastic gamma pre peak lower limit   see PLSUMTDCS histogram
gamma1max ToF cuts: plastic gamma pre preak upper limit   see PLSUMTDCS histogram
gamma2min ToF cuts: plastic gamma main peak lower limit   see PLSUMTDCS histogram
gamma2max ToF cuts: plastic gamma main peak upper limit   see PLSUMTDCS histogram
neutronmin ToF cuts: plastic neutrons lower limit   see PLSUMTDCS histogram
neutronmax ToF cuts: plastic neutrons upper limit   see PLSUMTDCS histogram
fcadcthr ADC cuts: FC pulse height threshold   see ADC histogram
fctdcmin ToF cuts: FC neutrons lower limit   see TDCFCDIFF histogram
fctdcmax ToF cuts: FC neutrons upper limit   see TDCFCDIFF histogram
all TAPS
v874b_mindead defines if the modules are set offline during readout 0: readout offline
1: readout online
1
v874b_emptyprog defines if empty events are enabled 0: disabled
1: enabled
1
v874b_bitpat defines if the bit patterns are measured 0: disabled
1: enabled
0
v874b_TACon defines if the TAC values are measured 0: disabled
1: enabled
0
v874b_LGon defines if the LG and LGS values are measured 0: disabled
1: enabled
0
v874b_SGon defines if the SG and SGS values are measured 0: disabled
1: enabled
1
v874b_lowthr underflow and over range suppression 0: disabled
1: enabled
1
v874b_bafthr underflow threshold in ch 0...255 3
v874b_bafsendthr defines an additional software threshold; all TAPS ADC Data words with measured values below v874b_bafsendthr will not be written to stream   0
v874b_Vset Vset: defines time resolution / range 0: 178 ps/ch (727 ns range)
43: 103 ps/ch (400 ns range)
140: 54 ps/ch (200 ns range)
140
v874b_Voff Voff: defines time offset 240: 300 ns
165: 400 ns
131: 500 ns
165
v874b_thrLED threshold of the leading edge discriminators 7819: 50 mV
7446: 100 mV
6701: 200 mV
8110
single TAPS
v874b_#_pedXY TAPS-Module no. # pedestal value for XY; # = {1...3}, X ={SLG, SGS, LG, SG}, Y= {1, 2, 3, 4}   5376
v874b_#_thrCFDY TAPS-Module no. # threshold value of CFDY; # = {1...3}, Y= {1, 2, 3, 4} 0...8117 see cabeling scheme

setup_vme_1.ini:

Variable

Meaning

Value Range

Recom-
mended for (n,n'g)

General
comment defines which comments should be printed out to the mbsprint_vme_1.l log-file 0: no comments
1: all comments
2: scaler values, errors, initialization
2
testrun defines if the actual setup_vme_1.ini will be copied for logging into the directory "mbsrun/nng/log/" 0: setup will be saved
1: setup will not be saved
0
scalerrestart defines if a check should be enabled at each scaler readout (trigger type 2) if the electronics setup is paralyzed, i.e. if the QDC buffers are full although TDC almost full level not reached 0: disabled
1: enabled
1
sleeptime defines time (in micro sec) how long the BaF2 branch should wait after initialization before starting measurement to be synchronized with the plastic branch   13000000
opcreadout defines if MBS should readout the OPC data from the shared memory; if this value is set to 1, opc2shm should run on rio6 0: disabled
1: enabled
0
setped defines if the SetPed routine is started to set the QDC pedestal values automatically to 100 0: disabled
1: enabled
0
Target
movetarget defines if the target is moved by software 0: target wil not be changed
1: software will change target
1
changetargetauto defines if scattering target is changed automatically to next position at "start acquisition" 0: disabled
1: enabled
1
settarget defines target position to be set if "changetargetauto" is set to 0 1...4 1
Scaler
sis3820_LNEtime time between each scaler readout in seconds 1...420 15
all TAPS
v874b_mindead defines if the modules are set offline while readout 0: readout offline
1: readout online
1
v874b_emptyprog defines if empty events are enabled 0: disabled
1: enabled
1
v874b_bitpat defines if the bit patterns are measured 0: disabled
1: enabled
0
v874b_TACon defines if the TAC values are measured 0: disabled
1: enabled
0
v874b_LGon defines if the LG and LGS values are measured 0: disabled
1: enabled
1
v874b_SGon defines if the SG and SGS values are measured 0: disabled
1: enabled
1
v874b_lowthr underflow and over range suppression 0: disabled
1: enabled
1
v874b_bafthr underflow threshold 0...255 3
v874b_bafsendthr defines an additional software threshold; all TAPS ADC Data words with measured values below v874b_bafsendthr will not be written to stream   0
v874b_Vset Vset: defines time resolution / range 0: 178 ps/ch (727 ns range)
43: 103 ps/ch (400 ns range)
140: 54 ps/ch (200 ns range)
140
v874b_Voff Voff: defines time offset 240: 300 ns
165: 400 ns
131: 500 ns
165
v874b_thrLED threshold of the leading edge discriminators 7819: 50 mV
7446: 100 mV
6701: 200 mV
8110
single TAPS
v874b_#_pedXY TAPS-Module no. # pedestal value for XY; # = {1...11}, X ={SLG, SGS, LG, SG}, Y= {1, 2, 3, 4}   5376
v874b_#_thrCFDY TAPS-Module no. # threshold value of CFDY; # = {1...11}, Y= {1, 2, 3, 4}  0...8117 see cabeling scheme

Contact

Dr. Roland Beyer
PostDoc / Beamline scientist
Nuclear Physics
roland.beyerAthzdr.de
Phone: +49 351 260 - 3281