Contact

Dr. Roland Beyer
PostDoc / Beamline scientist
Nuclear Physics
roland.beyerAthzdr.de
Phone: +49 351 260 - 3281

The nELBE Trigger Logic (up to April 2010)

(latest version)


The trigger logic of the nELBE detector setup is realized by means of a FPGA logic based on the CAEN V1495 General Purpose Board. We developed a firmware for the "User FPGA" of this module that contains all logic functions needed for a proper operation of our setup.

The module processes up to 100 input signals and releases 34 output signals. The meaning of these signals is shown below. All parameters needed by the logical functions can be modified via VME write access to the corresponding register. The register Address Map is also shown below.

In principle the Trigger output produced is the logical OR of:

  1. the downscaled OR of all Neutron Detector inputs,
  2. the downscaled OR of all BaF2 Detector inputs,
  3. the majority signal, generated if the number of BaF2 Detector inputs exceeds the Majority Level, and
  4. the Test Pulse input.

The generation of the trigger is disabled if any Veto signal is present.

The input signal are accepted only if they have a minimum length defined via the "BaF2 Min. Length" and "Neutron Detector Min. Length" registers.

The Trigger can be used to start the data acquisition of each DAQ module. Additionally a downscaled Trigger is produced that can be used to force the data readout by, e.g., the RIO power PCs.

Inputs: (all inputs have to be ECL or LVDS)

Port : Channel

Signal

Used for

A 0 Neutron Detector ch00 Plastic coincidence 1
... ... ...
5 Neutron Detector ch05 Plastic coincidence 6
6 Neutron Detector ch06 Pulser
7 Neutron Detector ch07 FC SCA
... ... ...
15 Neutron Detector ch15 not used
16 Test pulse Test Pulse for TAPS module (Scaler 3 control output 5)
B 0 Veto ch00 Busy TAPS module 1
... ... ...
10 Veto ch10 Busy TAPS module 11
11 Veto ch11 not used
... ... ...
15 Veto ch15 not used
16 Veto ch16 Total Dead Time Plastic Branch
17 Veto ch17 Busy Plastic TAPS 1
18 Veto ch18 Busy Plastic TAPS 2
19 Veto ch19 Busy Plastic TAPS 3
20 Veto ch20 Busy ADC
21 Veto ch21 not used
22 Veto ch22 not used
23 Veto ch23 Gamma veto
24 Veto ch24 Total Dead Time BaF2 Branch
25 Veto ch25 not used
... ... ...
31 Veto ch31 not used
D 0 BaF2 Detector ch00 BaF2 Leading Edge Discr. ch00
... ... ...
31 BaF2 Detector ch31 BaF2 Leading Edge Discr. ch31
E 0 BaF2 Detector ch32 BaF2 Leading Edge Discr. ch32
... ... ...
9 BaF2 Detector ch42 BaF2 Leading Edge Discr. ch42
10 BaF2 Detector ch43 not used
... ... ...
15 BaF2 Detector ch48 not used
16 BaF2 Detector ch49 not used
17 BaF2 Detector ch50 not used
18 BaF2 Detector ch51 not used
19 BaF2 Detector ch52 not used

Outputs:

Port : Channel

Signal

Used for

F

(ECL)

0 downscaled Trigger T1 Trigger
1 Trigger Gate Generator for Plastic TAPS
2 Trigger TDC 1 input ch00
3 Trigger TDC 1 Trigger
4 Trigger TDC 2 Trigger
5 Trigger TDC 2 input ch00
6 Trigger Scaler 1 input ch05
7 Dead Time Scaler 1 control input 4
8 Trigger Gate Generator for TAPS Comm
9 Trigger TAPS Test Pulse
10 Neutron Detector OR Scaler 2 input ch19
11 BaF2 Detector OR Scaler 2 input ch20
12 BaF2 Detector Majority Scaler 2 input ch21
13 Trigger Scaler 2 input ch18
14 downscaled Trigger Scaler 2 input ch17
15 Dead Time Scaler 2 control input 4
16 Trigger Gate Generator for ADC Gate
17 downscaled Trigger Monitoring
18 Neutron Detector OR Monitoring
19 BaF2 Detector OR Monitoring
20 BaF2 Detector Majority Monitoring
21 Test Pulse feed through Test Pulse of Plastic TAPS
22 internal Veto Monitoring
23 Veto feed through Monitoring
24 B:0 feed through Monitoring
25 B:16 feed through Monitoring
26 B:17 feed through Monitoring
27 B:18 feed through Monitoring
28 B:24 feed through Monitoring
29 A:0 feed through Monitoring
30 D:0 feed through Monitoring
31 D:0 internal signal Monitoring
G

(NIM)

0 Trigger Monitoring
1 Dead Time Monitoring

Address-Map of User Firmware (all standard registers with address above BASE + 0x7ffc are still available):

Address

BASE +

Register / Content

Data Access

Default Value

comment

0x0054 Majority Level D16 R/W 0x0101 Majority Level for BaF2 detector signals
0x0056 BaF2 Detector OR downscale factor D16 R/W 1  
0x0058 BaF2 Majority downscale factor D16 R/W 1  
0x005A Neutron Detector OR downscale factor D16 R/W 1  
0x005C Trigger output length D16 R/W 39 true length = (register value + 1) x 25 ns
default: 40 * 25 ns = 1 µs
0x005E BaF2 Min. Length D16 R/W 2 Minimum length of BaF2 detector signals to be accepted in units of 25 ns
0x0060 Neutron Detector Min. Length D16 R/W 2 Minimum length of Neutron Detector signals to be accepted in units of 25 ns
0x0062 Coincidence Window Width D16 R/W 20 in units of 25 ns
0x0064 Trigger downscale factor D16 R/W 32  
0x000C A Mask Low D16 R/W 0x0000 enables channels A:15..00 bit =0: channel disabled
bit =1: channel enabled
0x000E A Mask High D16 R/W 0x0000 enables channels A:31..16
0x0010 B Mask Low D16 R/W 0x0000 enables channels B:15..00
0x0012 B Mask High D16 R/W 0x0000 enables channels B:31..16
0x0048 D Mask Low D16 R/W 0x0000 enables channels D:15..00
0x004A D Mask High D16 R/W 0x0000 enables channels D:31..16
0x004C E Mask Low D16 R/W 0x0000 enables channels E:15..00
0x004E E Mask High D16 R/W 0x0000 enables channels E:31..16
0x0050 F Mask Low D16 R/W 0xFFFF enables channels F:15..00
0x0052 F Mask High D16 R/W 0xFFFF enables channels F:31..00
0x0066 Time save and reset D16 R/W 0 Tranfers dead and real time counter value into dead and real time registers and resets both counter
0x0068 Dead time low D16 R - Bits 00 to 15 of dead time counter value
0x006A Dead time mid D16 R - Bits 16 to 31 of dead time counter value
0x006C Dead time high D16 R - Bits 32 to 47 of dead time counter value
0x0070 Real time low D16 R - Bits 00 to 15 of real time counter value
0x0072 Real time mid D16 R - Bits 16 to 31 of real time counter value
0x0074 Real time high D16 R - Bits 32 to 47 of real time counter value
0x0100 LED control D16 R/W 0x0000 0x0000: LED controlled by FPGA
0x0100: LED off
0x0101: LED green
0x0102: LED red
0x0103: LED orange

Contact

Dr. Roland Beyer
PostDoc / Beamline scientist
Nuclear Physics
roland.beyerAthzdr.de
Phone: +49 351 260 - 3281