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Atomistic Simulations to Design a Room-Temperature Single Electron Transistor

Prüfer, T.; Möller, W.; von Borany, J.; Heinig, K. H.

For future low power-consumption nanoelectronics, a room-temperature single-electron transistor may be configured by placing a small (few nm diam.) Si nanodot in a thin (<10 nm) SiO2 interlayer in Si. This can be achieved by ion-irradiation induced interface mixing, which turns the oxide layer into metastable SiOx, and subsequent high-temperature thermal decomposition which leaves, for a sufficiently small mixed volume, a single Si nanodot in the SiO2 layer. Corresponding ion mixing simulations have been performed using the binary collision approximation (BCA)[1], followed by kinetic Monte-Carlo (KMC) simulations[2] of the decomposition process, with good qualitative agreement with the structures observed in related experiments. Quantitatively, however, the BCA simulation appears to overestimate the mixing effect. This is attributed to the neglect of the positive entropy of mixing of the Si-SiO2 system, i.e. the immiscibility counteracts the collisional mixing by “up-hill diffusion” [3]. Consequently, intermitting KMC diffusion steps have been introduced into the BCA mixing simulation, resulting in an excellent predictive power for the irradiation step of the production process. This work has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 688072.

  • [1] W. Möller et al., NIM B, 322, 23–33
  • [2] M. Strobel et al., PRB 64, 245422
  • [3] B. Liedke et al., NIM B 316 (2013) 56–61

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Publ.-Id: 28603