Molecular beam epitaxy of III-V semiconductor nanowires
This research topic focuses on the growth and the properties of III-V nanowires. The nanowire geometry allows for the epitaxial integration of materials with substantially different lattice constants and thermal expansion coefficients without the formation of dislocations. On that basis, we investigate the epitaxial growth of (a) III-V nanowires on very dissimilar substrates, like the technologically important Si, and (b) III-V axial or radial heterostructures. Beyond the growth mechanisms, we also explore the unique properties that arise from the low dimensionality of the nanowires and make them suitable for advanced thermoelectrics, low-power transistors, efficient solar cells, etc.
Our group specializes in the molecular beam epitaxy (MBE), which is an ultra-high vacuum technique for the epitaxial growth of crystalline materials on a heated substrate. By heating ultra-pure elements (like Ga, In, Al, As, etc.) in individual effusion cells, it is possible to produce atomic or molecular beams that impinge on the substrate surface, where eventually the epitaxial growth takes place. MBE allows for the growth of supreme quality heterostructures with accurately controlled composition or doping profiles, which is especially important for the exploration of low-dimensional physics. Our MBE apparatus is a Riber Compact 21, which is equipped with cells for group-III elements: Ga, In, and Al; group-V elements: As (valved cracker cell) and N (valved RF-plasma source); and dopants: Be (p-type) and Si (n-type). A LayTec EpiR M F TT system is also available for in-situ optical reflectometry.
T. Tauchnitz, T. Nurmamytov, R. Hübner, M. Engler, S. Facsko, H. Schneider, M. Helm, and E. Dimakis, Decoupling the two roles of Ga droplets in the self-catalyzed growth of GaAs nanowires on SiOx/Si(111), ACS Crystal Growth and Design 17, 5276−5282 (2017)
L. Balaghi, T. Tauchnitz, R. Hübner, L. Bischoff, H. Schneider, M. Helm, and E. Dimakis, Droplet-confined alternate pulsed epitaxy of GaAs nanowires on Si substrates down to CMOS-compatible temperatures, Nano Lett. 16, 4032 (2016)