Site-controlled Si Nanodot Formation for a RT-SET via Ion Beam Mixing and Phase Separation


Site-controlled Si Nanodot Formation for a RT-SET via Ion Beam Mixing and Phase Separation

Xu, X.; Wolf, D.; Prüfer, T.; Hlawacek, G.; Hübner, R.; Bischoff, L.; Perego, M.; Gharbi, A.; Heinig, K.-H.; von Borany, J.

The increased use of personal computing devices and the Internet of Things (IoT) is accompanied by a demand for a computation unit with extra low energy dissipation. The Single Electron Transistor (SET), which uses a Coulomb island to manipulate the movement of single electrons, is a candidate device for future low-power electronics. However, so far its development is hindered by low-temperature requirements and the absence of CMOS compatibility. By combining advanced top-down lithography with bottom-up self-assembly of Si nano dots (NDs) we will overcome this barrier.
In this work, Si NDs – suitable as RT Coulomb islands – are formed via ion beam mixing followed by thermally stimulated phase separation. Broad-beam Si+ and Ne+ beams followed by a rapid thermal annealing (RTA) treatment were utilized to create a layer of NDs, which are subsequently visualized by Energy-Filtered Transmission Electron Microscopy (EFTEM). The conditions for ND formation, namely the dependence on ion type, primary energy, irradiation fluence, layer thickness and thermal budget during RTA, are optimized based on an extensive survey of this multidimensional parameter space. The presented work is guided by TRIDYN simulations of the Si excess in a SiO2 layer due to ion beam mixing and 3D Kinetic Monte-Carlo (3DkMC) simulation for the phase separation during the thermal treatment. To tailor towards a single Si ND, the focused Ne+ beam from the Helium Ion Microscope (HIM) is utilized to create user defined patterns of NDs in planar layer stacks. This allows achieving a mixing volume small enough for restricted Ostwald ripening and successful single ND formation. The existence of the formation of spatially controlled single NDs with a diameter of only 2.2 nm is confirmed by comparing the EFTEM Si plasmon-loss intensity with simulated plasmon loss images.
In the future – by combining conventional lithography, direct self-assembly (DSA) and ion beam mixing – nanopillars with a single embedded ND will be integrated in a CMOS-compatible way. EFTEM and electrical characterization techniques will be used for realizing this novel pathway towards a room-temperature SET device.

This work has been funded by the European Union’s Horizon2020 research program ‘IONS4SET’ under Grant Agreement No. 688072.

Related publications

  • Lecture (Conference)
    FOR3NANO: Formation of 3D Nanostructures by Ion Beams, 29.06.2017, Helsinki, Finnland

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Publ.-Id: 26811