Site-controlled Si quantum dots in buried SiO2 layer formed by ion-beam implantation and phase separation

The increased use of personal computing devices and the Internet of Things (IoT) is accompanied by a demand for a computation unit with extra low energy dissipation. The single electron transistor (SET), which uses a Coulomb island to manipulate the movement of single electrons, is a candidate device for future low power electronics. However, so far its success is hindered by low temperature requirements and the missing CMOS-compatible fabrication route. By combining standard top-down lithography with bottom-up self-assembly of Si nanodots we will overcome this barrier.
In this work, Si nanodots--suitable for RT operation of SETs--are formed in a CMOS compatible way inside a buried SiO2 layer, providing the basic structure of an SET. This is achieved via phase separation induced by ion beam mixing in a geometrical restricted volume, followed by a thermal treatment. Guided by 3DkMC and TRI3DYN simulations, we utilize Helium Ion Microscopy (HIM) to irradiate continuous layers with Ne+, and Si+ broad beam irradiation of pillars. Both attempts lead to a restriction of the size of the collision cascade and hence the mixed volume. The size and position of the formed Si nanodots are studied with transmission electron microscopy, SIMS, and various electrical characterization techniques.