Novel Mixed Dimensional Reconfigurable Field Effect Transistors: Fabrication and Electrical Characterization

The physical downscaling of CMOS technology has reached its limitations. Subsequently, the quest for alternative technological solutions based on new materials and device concepts augment the downscaling of integrated circuits. One such concept is the reconfigurable FET (RFET), which can be dynamically programmed to n- or p-polarity by applying an electrostatic potential [1]. In this work, we present the idea of a novel mixed dimensional RFET device, which explores the potential of both one-dimensional (1D) channel materials (like silicon (Si) or silicon-germanium (SiGe) based nanowires) and two-dimensional (2D) materials. In the most generic process, an RFET device is based on intrinsic Si or SiGe nanowire with Nickel (Ni) placed on both ends. Subsequent annealing results in the formation of silicide regions in the nanowire. The junction of the silicide to Si or SiGe is a typical Schottky junction. By controlling the Schottky junction with the help of gating architectures, the flow of charge carriers within the channel can be modulated. For ambipolarity, an electrostatic potential on the back-gate or a single top-gate enables the n- or p-transport depending on the polarity of the gate voltage. The main aim of this work is to optimize the RFET architecture based on 2D materials like hexagonal boron nitride (hBN) as a dielectric and encapsulating layer instead of thermally grown oxide around the nanowire. 2D hBN comprises a structure very similar to graphene with its sub lattice consisting of boron or nitrogen atoms. However, contrary to graphene, hBN acts as an insulator with dielectric constant between 3-4 (similar to SiO2). The properties of atomically thin hBN like the absence of dangling bonds, resistance to oxidation and chemical stability makes it an ideal gate dielectric material for flexible electronics.

Top-down fabrication of RFETs is an essential requirement for large-scale device integration. The Si or SiGe nanowires are fabricated using electron beam lithography and reactive ion etching [2]. As reported in our previous works, the formation of silicided Schottky junctions by flash lamp annealing (FLA) yields better control over the silicide progression in the nanowire compared to rapid thermal annealing (RTA) [3,4]. This work focuses on the application of 2D hBN as a dielectric layer for nanowire-based devices. The devices fabricated and characterized consist of a mechanically exfoliated 2D hBN flake deposited on the single Si or SiGe nanowire-based devices by the dry viscoelastic stamping transfer technique. The thickness of the hBN flakes, investigated by atomic force microscopy and transmission electron microscopy, was between 5-10 nm (shown in figure 1). The energy dispersive X-ray analysis (EDX) was also carried out on the cross-sectioned devices for investigating the elemental distribution (figure 2). The ambipolar transfer characteristics of the Si-hBN devices with different gating architectures (compared in figure 3) show a significant improvement in subthreshold swing value due to the 2D encapsulation and passivation. The fabricated SiGe-hBN based devices also show an improvement of p and n on-currents and ION/IOFF ratio through back-gating due to the encapsulation and passivation of the nanowire by the hBN flake (figure 4).