Advanced thermal processing of semiconductor materials in the msec range (invited)

Recently a new interest evolved in short time annealing far below 1 sec, i.e. the lower limit of Rapid Thermal Processing (RTP). This was driven by the need of suppressing the so-called Transient Enhanced Diffusion in advanced boron-implanted shallow pn-junctions. After a short common overview about the new opportunities in materials processing, in this talk two examples will serve for the demonstration of the new interest in flash lamp annealing (time duration < 20 msec) within the framework of semiconductor materials processing: (i) For ultra-shallow junction formation in silicon Flash Lamp Processing (FLP) has become one of the challenging methods to meet the requirements for the next technology nodes defined by the ITRS roadmap. Low energy boron implants have been heat-treated in this way using peak temperatures in the range of 1100o to 1300oC and effective anneal times of 20 msec and 3 msec. Optimum processing conditions using a pulse time of 3 msec have been identified, under which one can obtain combinations of junction depth and sheet resistance values that meet even the 45 nm technology node requirements (ITRS 2001). (ii) The production of cubic SiC (3C-SiC) layers in device quality through the epitaxial growth on (100) Si wafers has remained a challenging task yet to overcome for selected applications the need in high cost bulk SiC wafers. It will be demonstrated that the use of Flash Lamp Processing (FLP) shows a new and promising way to the production of high quality 3C-layers. The FLASiC process bases on a new type of nanoscale liquid epitaxy at the interface SiC/Silicon leading to the formation of SiC seed layers with low defect density on which thicker SiC layers were epigrown.