Search for reaction pathways of a CMOS-compatible fabrication of nanofluidic channels by means of atomistic computer simulations

Nanofluidic devices are going to play an important role in miniaturization, automation and parallelization of chemical, biological, or medical systems. At present, the fabrication of microfluidic channel networks requires a large number of sophisticated processing steps. For "lab on a chip" devices, CMOS compatibility is desired in the fabrication process, additionally. In this contribution, we present potential reaction pathways of a nonconventional, however, CMOS-compatible fabrication method of nanofluidic channels and channel networks. The reaction pathways are predicted by Monte Carlo simulations which atomistically describe the evolution of a sample configuration during a thermal treatment. Referring to the "empty space-in-silicon" formation technique (T. Sato et al., Jnp. J. Appl. Phys. 43 (2003) 12.), a Si-(100) substrate is assumed which contains isolated trenches that are arranged in a line. This approach is modified by using trenches of different depths and diameters. During thermal treatment in a low-pressure hydrogen atmosphere, migration of surface atoms leads to an overall surface minimization. Thin trenches decouple quickly from the wafer surface forming buried voids. In a self-organizing manner, neighboring voids may coalesce and, thus, they construct a buried channel. Due to their lower surface-to-volume ratio, thick trenches are more stable. They remain in contact with the wafer surface and, therefore, they may act as vertical supply and drain pipes for the buried channels. In addition, the simulations predict the formation of elementary nanochannel networks such as T-junctions, X-junctions, or Hfilters. The channel surface of the whole active layer can be transformed into SiO2 by postfabrication oxidation.