Doubly-stacked Si dots in SiO₂ formed by ion beam mixing – a way to improve retention of nanocrystal memories

Nonvolatile nanocluster (NC) memories fabricated by Si ion implantation/irradiation of SiO₂ gate oxides have some key parameters which are superior to those of state-of-theart devices [1-3]. However, data retention is below industrial requirements. Former studies have proven that a doubly-stacked nanocluster structure can improve retention by several orders of magnitude [4]. However, it is difficult to fabricate pairs of NCs where a big NC is located above a smaller ones. Additionally, the NCs of a pair must have a narrow intercluster spacing, and the smaller NCs must be located just a few nm above the Si substrate. Here, based on atomistic process simulations, a novel fabrication technique of selfaligned doubly-stacked Si NCs will be presented. It is assumed that a layer of large (<10nm) Si NCs is placed on top of ~10nm thermal oxide by a conventional (e.g. CVD) technique. This structure is covered by a control oxide. Tiny (~3 nm), self-aligned NCs between the large NCs and the substrate form during annealing after energetic ion irradiation. As described in ref. [5], ion beam mixing at Si/SiO₂ interfaces results in the formation of tiny NCs. Here, mixing from the substrate and the large NCs lead to selective formation of tiny NCs below the large NCs. The stability of this CMOS-compatible processing for memory fabrication will be evaluated.
[1] B. Schmidt, K.-H. Heinig et al., Nucl.Instr.Meth. B242, 146 (2006).
[2] P. Dimikratis et al., J.Phys.Conf.Ser. 10, 7 (2005).
[3] T. Müller, K.-H. Heinig et al., Appl. Phys. Lett. 85, 2373 (2004).
[4] R. Ohba et al., IEEE Trans. El. Dev. 49, 1392 (2002).
[5] K.-H. Heinig et al., Appl. Phys. A 77, 17–25 (2003).