Data Acquisition Manual for NeuLAND MRPC Experiments (FPGA version; RIO type IV)

• Scaler parameters
  scaling time = x -> Time of the scaling period in seconds. x = [0 ... 2^16-1]
  enable on the fly update = x -> Determines wether the data acquisition updates the scaling time or not. If the parameter is 1, the DAQ checks after every scaler readout the settings.txt file and reads the scaling time parameter. If the parameter has changes since the last time, the daq will update parameter in the according register. If the parameter is 0, the DAQ only read the scaling time during the initalization process.
• Trigger logic
  The NeuLAND Trigger condition can be set via the settings file without changing the cabling. To define a trigger, on must choose which signal is part of the trigger and their logical connection.
  Trigger function = x -> defines the logical connection between the selected signals
• x = 0 -> Trigger = OR of selected signals
  x = 1 -> Trigger = AND of selected signals
  Trigger ... = y -> defines if signal is part of trigger
  y = 0 -> Signal is not part of trigger
  y = 1 -> Signal is part of trigger
• TDC parameters
  TDC search window width = x -> Set width of the TDC match window in ns; step size = 25ns
  TDC search window offset = x -> Set offset of the TDC match window in ns with respect to the trigger itself, i.e. the time difference between the start of the match window and the trigger time; step size = 25ns
• QDC parameters
  QDC delay = d -> Set the delay of the QDC gate.
  delay = 25 ns + d · 1 ns
  QDC gate  = w -> Set the width of the QDC gate width.
  width = 25 ns + w · 1 ns
  x and y can be set in the range from 0 to 255.

• FPGA parameters
  FPGA Scaler = x ->Enable/Disable the readout of scaler values.
  Mask Port ... = x -> Each input of the V1495 can be masked. Therefore each signal is connected with its according bit in the mask register via a logical AND. If the bit is 1, the signal passes. If the bit is 0, the signal is blocked.

Settings for NeuLAND MRPC data acquisition

scaling time = 1
enable on the fly update = 1
Trigger function = 0
Trigger S1      = 0
Trigger S2      = 0
Trigger S3      = 1
Trigger S4      = 0
Trigger S5      = 0
Trigger S6      = 0
Trigger RF      = 0
TDC search window width = 400
TDC search window offset = 200
QDC delay = 120
QDC gate  = 120
FPGA Scaler = 1
Mask Port A = 0xFFFFFFFF
Mask Port B = 0xFFFFFFFF
Mask Port C = 0xFFFFFFFF
Mask Port D = 0xFFFFFFFF
Mask Port E = 0xFFFFFFFF
Mask Port F = 0xFFFFFFFF