The nELBE (n,tot) automatic absorber changer - FPGA 2

The absorber changing in neutron transmission measurements is realized by means of a FPGA logic based on the CAEN V1495 General Purpose Board. We developed a firmware for the "User FPGA" of this module that contains all logic functions needed for a proper operation.

The module processes 5 input signals and releases 7 output signals. The meaning of these signals is shown below. All parameters needed by the logical functions can be modified via VME write access to the corresponding register. The register Address Map is also shown below.

The logic schema is shown in the picture below. The input signals are output signals of the absorber control box that is connected to the lead loop control electronics. The status of these inputs is permanently converted into the 5 lowest bits of the absorber status register.
5 output channels that are connected to the inputs of the absorber control box are used to change the absorber position. By setting bit 0 of the control register to 1 the content of the five lowest bits of the absorber set register is converted to logical signals. Depending on which one of these five bits was set to 1, the corresponding absorber position will be reached.

Two clocks are derived from the internal 40 MHz clock of the FPGA board: a 25 kHz clock and a 1 Hz one. The 25 kHz clock (i.e. 40 micro second period) is used if the continuous storage mode of the TDC is active to monitor the 12 bit TDC clock overflow. The 1 Hz clock is used to time the next absorber change. A trigger signal is generated, when a given number of seconds (defined by the absorber time register) past by.

Inputs:

Port : Channel		Signal	Used for
A (ECL or LVDS)	0	not used
	...	...
	31	not used
B (ECL or LVDS)	0	not used
	...	...
	31	not used
D (NIM)	0	Absorber 1	read absorber position
	1	Absorber 2	read absorber position
	2	Absorber 3	read absorber position
	3	Absorber 4	read absorber position
	4	Absorber 5	read absorber position
	5	not used
	6	not used
	7	not used

Outputs:

Port : Channel		Signal	Used for
E (NIM)	0	Absorber 1	set absorber position
	1	Absorber 2	set absorber position
	2	Absorber 3	set absorber position
	3	Absorber 4	set absorber position
	4	Absorber 5	set absorber position
	5	not used
	6	not used
	7	usec clock	TDC in 14
F (ECL)	0	abs_time_reached	T4
	1	usec_clock	Scaler input 20
	2	not used
	...
	7	not used
	8	sec_clock_long
	9	LCLK
	10	mod_enable
	11	count_enable
	12	usec_clock_long
	13	not used
	...	...
	31	not used
G (NIM)	0	abs_stat_global
	1	abs_set_global

Address-Map of User Firmware

(all standard registers with address above BASE + 0x7ffc are still available):

Address BASE +	Register / Content	Data Access		Default Value	Bit range	comment
0x1018	A Mask	D32	R/W	0xFFFFFFFF	31 ... 0	enables channels A:31..00	bit = 0: channel disabled bit = 1: channel enabled
0x101C	B Mask	D32	R/W	0xFFFFFFFF	31 ... 0	enables channels B:31..00
0x1020	C Mask	D32	R/W	0xFFFFFFFF	31 ... 0	enables channels C:31..00
0x1024	D Mask	D32	R/W	0xFFFFFFFF	31 ... 0	enables channels D:31..00
0x1028	E Mask	D32	R/W	0xFFFFFFFF	31 ... 0	enables channels E:31..00
0x102C	F Mask	D32	R/W	0xFFFFFFFF	31 ... 0	enables channels F:31..00
0x1030	ID Mezzanine D	D32	R		2 ... 0	Port D	bit 2..0: type of mezzanine board: b000: A395A b001: A395B b010: A395C b011: A395D
0x1034	ID Mezzanine E	D32	R		2 ... 0	Port E
0x1038	ID Mezzanine F	D32	R		2 ... 0	Port F
0x1100	User FPGA firmware revision	D32	R		15 ... 0	bit 15..12: setup ID (0 = inel., 1 = transm.) bit 11..8: major revision no. bit 7..0: minor revision no.
0x1104	Scratch register	D32	R/W	0xDEADBEEF	31 ... 0
0x1108	LED control	D32	R/W	0	8, 1, 0	bit 8: 0 = FPGA controled, 1 = user controled bit 1: 0 = off, 1 = green bit 0: 0 = off, 1 = red
0x110C	GEO address	D32	R/W	0	4 ... 0
0x1200	absorber change time			0	31 ... 0	in units of seconds
0x1204	absober control register	D32	R/W	0	1, 0	bit 1: 0 = disable and reset change time counter   1 = start change time counter bit 0: 1 = copy absorber set register to output ports
0x1208	absorber status	D32	R	0	8 ... 0	bit 8: 1 = absorber change time reched bit 7..0: current absorber position
0x120C	absorber set	D32	R/W	0	7 ... 0